Using SystemVerilog code. Design a CPU that run three programs and design the instruction set and instruction formats and code three programs to run on your instruction set.
Here is the general flow/preview on how all 4 labs work together:
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In Lab 1, you are going generate your assembly instructions and binary conversions for each of your assembly instructions for your ISA.
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In Lab 2, you are going to design the processor in SystemVerilog. This consists of ALUs, Control Units, Memory Units, etc. connected to each other.
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In Lab 3, you are going to design an assembler that converts the Assembly code you generate in Programs 1, 2, and 3 to binary.
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In Lab 4, you are going to use the binary code generated by your assembler in lab 3 to test your processor design.
SAMPLE ASSIGNMENT
