EE2501 Lab 4: Implementation of Adders
1. Construct the Half Adder shown in the lab procedure Step 1 in a simulator (i.e.
CircuitVerse or similar). Verify truth table operation by running the simulator
through all possible input combinations – use snipping tool or similar to capture
screenshots of output for each row of truth table input combinations.
2. Construct the Full Adder as described in the lab procedure Step 2 in a simulator (i.e.CircuitVerse or similar). Verify truth table operation by running the simulator
through all possible input combinations – use snipping tool or similar to capture
screenshots of output for each row of truth table input combinations.
3. Sketch block diagram of n-bit Full Adder as described in Step 3
DETAILED ASSIGNMENT
